add notebook

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Pierre Guillod 2023-04-09 23:57:34 +02:00
parent c6676a6965
commit e4d1713e48
Signed by: pierre
GPG key ID: B00B454469924EDF

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{
"cells": [
{
"cell_type": "markdown",
"metadata": {
"id": "HkFeU0R-0hzi"
},
"source": [
"# Semicustom digital design demo using OpenROAD"
]
},
{
"cell_type": "markdown",
"metadata": {},
"source": [
"## Sources"
]
},
{
"cell_type": "markdown",
"metadata": {
"id": "uINjDJNf39eD"
},
"source": [
"### RTL description (Verilog)\n",
"\n",
"The OpenROAD workflow takes the circuit's RTL description as an input. For instance, it can be a three bits XOR gate."
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {
"id": "gpgkIYB739Ii"
},
"outputs": [],
"source": [
"%%writefile inverter.v\n",
"module inverter(\n",
" input wire a,\n",
" input wire b,\n",
" input wire c,\n",
" output wire out\n",
");\n",
" assign out = a ^ b ^ c;\n",
"endmodule"
]
},
{
"cell_type": "markdown",
"metadata": {
"id": "hp8h5vH8TUXr"
},
"source": [
"### Configuration file (JSON)\n",
"\n",
"A configuration file should be provided. It describes constraints and strategies applied during synthesis and implementation of the circuit."
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {
"id": "rbT-vP0h0enK"
},
"outputs": [],
"source": [
"%%writefile config.json\n",
"{\n",
" \"DESIGN_NAME\": \"inverter\",\n",
" \"VERILOG_FILES\": \"dir::inverter.v\",\n",
" \"CLOCK_TREE_SYNTH\": false,\n",
" \"CLOCK_PORT\": null,\n",
" \"PL_RANDOM_GLB_PLACEMENT\": true,\n",
" \"FP_SIZING\": \"absolute\",\n",
" \"DIE_AREA\": \"0 0 40 40\",\n",
" \"PL_TARGET_DENSITY\": 0.8,\n",
" \"FP_PDN_AUTO_ADJUST\": false,\n",
" \"FP_PDN_VPITCH\": 10,\n",
" \"FP_PDN_HPITCH\": 10,\n",
" \"FP_PDN_VOFFSET\": 5,\n",
" \"FP_PDN_HOFFSET\": 5,\n",
" \"DIODE_INSERTION_STRATEGY\": 3\n",
"}"
]
},
{
"cell_type": "markdown",
"metadata": {},
"source": [
"## Workflow\n",
"The provided `flow.tcl` is a script describing the OpenROAD workflow. A _GDS_ file will be generated using the RTL circuit description, the PDK and the configuration file."
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {
"colab": {
"base_uri": "https://localhost:8080/"
},
"id": "VP60fdObiP15",
"outputId": "41aa85e4-c663-4778-d448-928dbe474b11"
},
"outputs": [],
"source": [
"%env PDK=sky130A\n",
"!flow.tcl -design ."
]
},
{
"cell_type": "markdown",
"metadata": {},
"source": [
"## Output products"
]
},
{
"cell_type": "markdown",
"metadata": {
"id": "luguFgZ43AeL"
},
"source": [
"### Display layout\n",
"\n",
"The implemented layout can be retrieved as follows:"
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {
"colab": {
"base_uri": "https://localhost:8080/",
"height": 650
},
"id": "WOnhdtp3ivRi",
"outputId": "b4bd26f8-d3da-47b7-e321-99272b0591ef",
"scrolled": false
},
"outputs": [],
"source": [
"import glob\n",
"import gdstk\n",
"import IPython.display\n",
"\n",
"gdsii = sorted(glob.glob(\"./runs/*/results/final/gds/*.gds\"))[-1]\n",
"top = gdstk.read_gds(gdsii).top_level()\n",
"top[0].write_svg('inverter.svg')\n",
"IPython.display.SVG('inverter.svg')"
]
},
{
"cell_type": "markdown",
"metadata": {
"id": "NW_7YdgTZYQK"
},
"source": [
"### Reporting\n",
"\n",
"Many reports are available under:\n",
"\n",
"```\n",
"freeechips/semicustom/runs/RUN_YYYY.MM.DD_HH.MM.SS/reports/.\n",
"```\n",
"\n",
"An overview of the main figures can be retrieved as well:"
]
},
{
"cell_type": "code",
"execution_count": null,
"metadata": {
"colab": {
"base_uri": "https://localhost:8080/",
"height": 1000
},
"id": "OWAwQI3fZC4W",
"outputId": "d50dcf9f-30cd-42a3-dab5-12992bc9dca2",
"scrolled": false
},
"outputs": [],
"source": [
"import glob\n",
"import pandas as pd\n",
"\n",
"metrics = pd.read_csv(sorted(glob.glob(\"./runs/*/reports/metrics.csv\"))[-1])\n",
"\n",
"print(f\"tritonRoute_violations {metrics['tritonRoute_violations'][0]}\")\n",
"print(f\"Short_violations {metrics['Short_violations'][0]}\")\n",
"print(f\"OffGrid_violations {metrics['OffGrid_violations'][0]}\")\n",
"print(f\"MinHole_violations {metrics['MinHole_violations'][0]}\")\n",
"print(f\"Other_violations {metrics['Other_violations'][0]}\")\n",
"print(f\"Magic_violations {metrics['Magic_violations'][0]}\")\n",
"print(f\"pin_antenna_violations {metrics['pin_antenna_violations'][0]}\")\n",
"print(f\"net_antenna_violations {metrics['net_antenna_violations'][0]}\")\n",
"print(f\"lvs_total_errors {metrics['lvs_total_errors'][0]}\")\n",
"print(f\"cvc_total_errors {metrics['cvc_total_errors'][0]}\")\n",
"print(f\"klayout_violations {metrics['klayout_violations'][0]}\")"
]
}
],
"metadata": {
"colab": {
"name": "digital-inverter-openlane.ipynb",
"provenance": []
},
"kernelspec": {
"display_name": "Python 3 (ipykernel)",
"language": "python",
"name": "python3"
},
"language_info": {
"codemirror_mode": {
"name": "ipython",
"version": 3
},
"file_extension": ".py",
"mimetype": "text/x-python",
"name": "python",
"nbconvert_exporter": "python",
"pygments_lexer": "ipython3",
"version": "3.7.16"
}
},
"nbformat": 4,
"nbformat_minor": 1
}