{
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   "metadata": {
    "id": "HkFeU0R-0hzi"
   },
   "source": [
    "# Semicustom digital design demo using OpenROAD"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Sources"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "id": "uINjDJNf39eD"
   },
   "source": [
    "### RTL description (Verilog)\n",
    "\n",
    "The OpenROAD workflow takes the circuit's RTL description as an input. For instance, it can be a three bits XOR gate."
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 1,
   "metadata": {
    "id": "gpgkIYB739Ii"
   },
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "Writing inverter.v\n"
     ]
    }
   ],
   "source": [
    "%%writefile inverter.v\n",
    "module inverter(\n",
    "    input wire a,\n",
    "    input wire b,\n",
    "    input wire c,\n",
    "    output wire out\n",
    ");\n",
    "    assign out = a ^ b ^ c;\n",
    "endmodule"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "id": "hp8h5vH8TUXr"
   },
   "source": [
    "### Configuration file (JSON)\n",
    "\n",
    "A configuration file should be provided. It describes constraints and strategies applied during synthesis and implementation of the circuit."
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 2,
   "metadata": {
    "id": "rbT-vP0h0enK"
   },
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "Writing config.json\n"
     ]
    }
   ],
   "source": [
    "%%writefile config.json\n",
    "{\n",
    "    \"DESIGN_NAME\": \"inverter\",\n",
    "    \"VERILOG_FILES\": \"dir::inverter.v\",\n",
    "    \"CLOCK_TREE_SYNTH\": false,\n",
    "    \"CLOCK_PORT\": null,\n",
    "    \"PL_RANDOM_GLB_PLACEMENT\": true,\n",
    "    \"FP_SIZING\": \"absolute\",\n",
    "    \"DIE_AREA\": \"0 0 40 40\",\n",
    "    \"PL_TARGET_DENSITY\": 0.8,\n",
    "    \"FP_PDN_AUTO_ADJUST\": false,\n",
    "    \"FP_PDN_VPITCH\": 10,\n",
    "    \"FP_PDN_HPITCH\": 10,\n",
    "    \"FP_PDN_VOFFSET\": 5,\n",
    "    \"FP_PDN_HOFFSET\": 5,\n",
    "    \"DIODE_INSERTION_STRATEGY\": 3\n",
    "}"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Workflow\n",
    "The provided `flow.tcl` is a script describing the OpenROAD workflow. A _GDS_ file will be generated using the RTL circuit description, the PDK and the configuration file."
   ]
  },
  {
   "cell_type": "code",
   "execution_count": 3,
   "metadata": {
    "colab": {
     "base_uri": "https://localhost:8080/"
    },
    "id": "VP60fdObiP15",
    "outputId": "41aa85e4-c663-4778-d448-928dbe474b11"
   },
   "outputs": [
    {
     "name": "stdout",
     "output_type": "stream",
     "text": [
      "env: PDK=sky130A\n",
      "OpenLane 2023.04.07_0_gcb634fd5-conda\n",
      "All rights reserved. (c) 2020-2022 Efabless Corporation and contributors.\n",
      "Available under the Apache License, version 2.0. See the LICENSE file for more details.\n",
      "\n",
      "\u001b[36m[INFO]: Using configuration in 'config.json'...\u001b[39m\n",
      "\u001b[36m[INFO]: PDK Root: /home/pierre/anaconda3/envs/semicustom/share/pdk\u001b[39m\n",
      "\u001b[36m[INFO]: Process Design Kit: sky130A\u001b[39m\n",
      "\u001b[36m[INFO]: Standard Cell Library: sky130_fd_sc_hd\u001b[39m\n",
      "\u001b[36m[INFO]: Optimization Standard Cell Library: sky130_fd_sc_hd\u001b[39m\n",
      "\u001b[33m[WARNING]: DIODE_INSERTION_STRATEGY is now deprecated; use GRT_REPAIR_ANTENNAS, DIODE_ON_PORTS and RUN_HEURISTIC_DIODE_INSERTION instead.\u001b[39m\n",
      "\u001b[36m[INFO]: DIODE_INSERTION_STRATEGY set to 3. Setting GRT_REPAIR_ANTENNAS to 1\u001b[39m\n",
      "\u001b[36m[INFO]: Run Directory: /home/pierre/Documents/freechips/semicustom/runs/RUN_2023.04.13_16.56.42\u001b[39m\n",
      "\u001b[36m[INFO]: Preparing LEF files for the nom corner...\u001b[39m\n",
      "\u001b[31m[ERROR]: during executing: \"openroad -exit -no_init -python /home/pierre/anaconda3/envs/semicustom/share/openlane/scripts/odbpy/lefutil.py get_metal_layers -o /home/pierre/Documents/freechips/semicustom/runs/RUN_2023.04.13_16.56.42/tmp/layers.list /home/pierre/anaconda3/envs/semicustom/share/pdk/sky130A/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef\"\u001b[39m\n",
      "\u001b[31m[ERROR]: Exit code: 1\u001b[39m\n",
      "\u001b[31m[ERROR]: Last 10 lines:\n",
      "OpenROAD b848aaed251d09d5c855c1dbce9f189b52862707 \n",
      "This program is licensed under the BSD-3 license. See the LICENSE file for details.\n",
      "Components of this program may be licensed under more restrictive licenses which must be honored.\n",
      "Unknown option: -e\n",
      "usage: openroad [option] ... [-c cmd | -m mod | file | -] [arg] ...\n",
      "Try `python -h' for more information.\n",
      "\u001b[39m\n",
      "\n",
      "    while executing\n",
      "\"throw_error\"\n",
      "    (procedure \"try_exec\" line 17)\n",
      "    invoked from within\n",
      "\"try_exec $::env(OPENROAD_BIN) -exit -no_init -python $::env(SCRIPTS_DIR)/odbpy/lefutil.py get_metal_layers -o $::env(TMP_DIR)/layers.list $arg_values(...\"\n",
      "    (procedure \"prep_lefs\" line 36)\n",
      "    invoked from within\n",
      "\"prep_lefs -tech_lef $::env(TECH_LEF) -corner nom -env_var MERGED_LEF\"\n",
      "    (procedure \"prep\" line 316)\n",
      "    invoked from within\n",
      "\"prep {*}$args\"\n",
      "    (procedure \"run_non_interactive_mode\" line 12)\n",
      "    invoked from within\n",
      "\"run_non_interactive_mode {*}$argv\"\n",
      "    (file \"/home/pierre/anaconda3/envs/semicustom/share/openlane/flow.tcl\" line 415)\n",
      "    invoked from within\n",
      "\"source \"$::env(CONDA_PREFIX)/share/openlane/flow.tcl\"\"\n",
      "    (file \"/home/pierre/anaconda3/envs/semicustom/bin/flow.tcl\" line 2)\n"
     ]
    }
   ],
   "source": [
    "%env PDK=sky130A\n",
    "!flow.tcl -design ."
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "## Output products"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "id": "luguFgZ43AeL"
   },
   "source": [
    "### Display layout\n",
    "\n",
    "The implemented layout can be retrieved as follows:"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": null,
   "metadata": {
    "colab": {
     "base_uri": "https://localhost:8080/",
     "height": 650
    },
    "id": "WOnhdtp3ivRi",
    "outputId": "b4bd26f8-d3da-47b7-e321-99272b0591ef",
    "scrolled": false
   },
   "outputs": [],
   "source": [
    "import glob\n",
    "import gdstk\n",
    "import IPython.display\n",
    "\n",
    "gdsii = sorted(glob.glob(\"./runs/*/results/final/gds/*.gds\"))[-1]\n",
    "top = gdstk.read_gds(gdsii).top_level()\n",
    "top[0].write_svg('inverter.svg')\n",
    "IPython.display.SVG('inverter.svg')"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {
    "id": "NW_7YdgTZYQK"
   },
   "source": [
    "### Reporting\n",
    "\n",
    "Many reports are available under:\n",
    "\n",
    "```\n",
    "freeechips/semicustom/runs/RUN_YYYY.MM.DD_HH.MM.SS/reports/.\n",
    "```\n",
    "\n",
    "An overview of the main figures can be retrieved as well:"
   ]
  },
  {
   "cell_type": "code",
   "execution_count": null,
   "metadata": {
    "colab": {
     "base_uri": "https://localhost:8080/",
     "height": 1000
    },
    "id": "OWAwQI3fZC4W",
    "outputId": "d50dcf9f-30cd-42a3-dab5-12992bc9dca2",
    "scrolled": false
   },
   "outputs": [],
   "source": [
    "import glob\n",
    "import pandas as pd\n",
    "\n",
    "metrics = pd.read_csv(sorted(glob.glob(\"./runs/*/reports/metrics.csv\"))[-1])\n",
    "\n",
    "print(f\"tritonRoute_violations  {metrics['tritonRoute_violations'][0]}\")\n",
    "print(f\"Short_violations        {metrics['Short_violations'][0]}\")\n",
    "print(f\"OffGrid_violations      {metrics['OffGrid_violations'][0]}\")\n",
    "print(f\"MinHole_violations      {metrics['MinHole_violations'][0]}\")\n",
    "print(f\"Other_violations        {metrics['Other_violations'][0]}\")\n",
    "print(f\"Magic_violations        {metrics['Magic_violations'][0]}\")\n",
    "print(f\"pin_antenna_violations  {metrics['pin_antenna_violations'][0]}\")\n",
    "print(f\"net_antenna_violations  {metrics['net_antenna_violations'][0]}\")\n",
    "print(f\"lvs_total_errors        {metrics['lvs_total_errors'][0]}\")\n",
    "print(f\"cvc_total_errors        {metrics['cvc_total_errors'][0]}\")\n",
    "print(f\"klayout_violations      {metrics['klayout_violations'][0]}\")"
   ]
  },
  {
   "cell_type": "markdown",
   "metadata": {},
   "source": [
    "# References\n",
    "Inspired from:\n",
    "“Silicon Notebooks.” CHIPS Alliance, Apr. 08, 2023. Accessed: Apr. 10, 2023. [Online]. Available: https://github.com/chipsalliance/silicon-notebooks/blob/b65134a43b01ae31423f7ee87110740b2257ac42/digital-inverter-openlane.ipynb (Apache License 2.0)"
   ]
  }
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